Yifan Hong

Constant-rate quantum low-density parity-check (LDPC) codes promise fault-tolerant quantum computation with constant spatial overhead in the asymptotic limit. Nonetheless, discovering finite-length code instances with good practical performance remains challenging. We introduce a new family of quantum LDPC codes with design rate $1/5$ and check weight $9$ that approaches the teraquop memory regime per qubit-round with several hundred physical qubits, under idling-free circuit-level noise of strength $0.1\%$ and GPU-accelerated Relay-belief-propagation (Relay-BP) decoding with average latencies around 1-2 ms, a regime relevant to trapped-ion and neutral-atom processors. The construction involves the balanced product of classical LDPC codes with design rate $1/2$ that share non-abelian $\mathbb{Z}_\ell \rtimes \mathbb{Z}_m$ group symmetries, which may be of independent interest for classical error correction. We build syndrome extraction circuits tailored to reconfigurable atom arrays using a simple greedy scheduler, with single-round rearrangement times around 30-60 ms using present hardware specifications, and substantial room for future improvements. We also construct logical Pauli bases that are equivariant with respect to the group symmetry, which can significantly compress the design space for code surgery. Together, these results further advance the practicality of constant-rate quantum LDPC codes for near-term, fault-tolerant quantum computers.

Quantum error correction protects logical quantum information against environmental decoherence by encoding logical qubits into entangled states of physical qubits. One of the most important near-term challenges in building a scalable quantum computer is to reach the break-even point, where logical quantum circuits on error-corrected qubits achieve higher fidelity than equivalent circuits on uncorrected physical qubits. Using Quantinuum's H2 trapped-ion quantum processor, we encode the GHZ state in four logical qubits with fidelity $ 99.5 \pm 0.15 \% \le F \le 99.7 \pm 0.1\% $ (after postselecting on over 98% of outcomes). Using the same quantum processor, we can prepare an uncorrected GHZ state on four physical qubits with fidelity $97.8 \pm 0.2 \% \le F\le 98.7\pm 0.2\%$. The logical qubits are encoded in a $[\![ 25,4,3 ]\!]$ Tanner-transformed long-range-enhanced surface code. Logical entangling gates are implemented using simple swap operations. Our results are a first step towards realizing fault-tolerant quantum computation with logical qubits encoded in geometrically nonlocal quantum low-density parity check codes.

The surface code is a quantum error-correcting code for one logical qubit, protected by spatially localized parity checks in two dimensions. Due to fundamental constraints from spatial locality, storing more logical qubits requires either sacrificing the robustness of the surface code against errors or increasing the number of physical qubits. We bound the minimal number of spatially nonlocal parity checks necessary to add logical qubits to a surface code while maintaining, or improving, robustness to errors. We saturate the lower limit of this bound, when the number of added logical qubits is a constant, using a family of hypergraph product codes, interpolating between the surface code and constant-rate low-density parity-check codes. Fault-tolerant protocols for logical gates in the quantum code can be inherited from its classical parent codes. We provide near-term practical implementations of this code for hardware based on trapped ions or neutral atoms in mobile optical tweezers. Long-range-enhanced surface codes outperform conventional surface codes using hundreds of physical qubits, and represent a practical strategy to enhance the robustness of logical qubits to errors in near-term devices.