C. Tigges

Design, Fabrication, and Experimental Demonstration of Junction Surface Ion Traps

D. L. Moehring, C. Highstrete, D. Stick, K. M. Fortier, R. Haltli [1], C. Tigges [1], M. G. Blain [1]

Abstract

We present the design, fabrication, and experimental implementation of surface ion traps with Y-shaped junctions. The traps are designed to minimize the pseudopotential variations in the junction region at the symmetric intersection of three linear segments. We experimentally demonstrate robust linear and junction shuttling with greater than one million round-trip shuttles without ion loss. By minimizing the direct line of sight between trapped ions and dielectric surfaces, negligible day-to-day and trap-to-trap variations are observed. In addition to high-fidelity single-ion shuttling, multiple-ion chains survive splitting, ion-position swapping, and recombining routines. The development of two-dimensional trapping structures is an important milestone for ion-trap quantum computing and quantum simulations.

Demonstration of a microfabricated surface electrode ion trap

D Stick, K M Fortier, R Haltli, C Highstrete, D L Moehring, C Tigges, M G Blain

Abstract

In this paper we present the design, modeling, and experimental testing of surface electrode ion traps fabricated in a heterostructure configuration comprising a silicon substrate, silicon dioxide insulators, and aluminum electrodes. This linear trap has a geometry with symmetric RF leads, two interior DC electrodes, and 40 individual lateral DC electrodes. Plasma enhanced chemical vapor deposition (PECVD) was used to grow silicon dioxide pillars to electrically separate overhung aluminum electrodes from an aluminum ground plane. In addition to fabrication, we report techniques for modeling the control voltage solutions and the successful demonstration of trapping and shuttling ions in two identically constructed traps.