M. G. Blain

Surface ion traps with two-dimensional layouts of trapping regions are natural architectures for storing large numbers of ions and supporting the connectivity needed to implement quantum algorithms. Many of the components and operations needed to fully exploit this architecture have already been demonstrated, including operation at cryogenic temperatures with low heating, low excitation transport, and ion control and detection with integrated photonics. Here we demonstrate a trap that addresses the scaling challenge of increasing power dissipation as the RF electrode increases in size. By raising the RF electrode and removing most of the insulating dielectric layer below it we reduce both ohmic and dielectric power dissipation. We also measure heating rates across a range of motional frequencies and for different voltage sources in a trap with a raised RF electrode but solid dielectric.

Laser-cleaning of the electrodes in a planar micro-fabricated ion trap has been attempted using ns pulses from a tripled Nd:YAG laser at 355nm. The effect of the laser pulses at several energy density levels has been tested by measuring the heating rate of a single 40Ca+ trapped ion as a function of its secular frequency. A reduction of the electric-field noise spectral density by ~50% has been observed and a change in the frequency dependence also noticed. This is the first reported experiment where the "anomalous heating" phenomenon has been reduced by removing the source as opposed to reducing its thermal driving by cryogenic cooling. This technique may open the way to better control of the electrode surface quality in ion microtraps.

We characterise the performance of a surface-electrode ion "chip" trap fabricated using established semiconductor integrated circuit and micro-electro-mechanical-system (MEMS) microfabrication processes which are in principle scalable to much larger ion trap arrays, as proposed for implementing ion trap quantum information processing. We measure rf ion micromotion parallel and perpendicular to the plane of the trap electrodes, and find that on-package capacitors reduce this to <~ 10 nm in amplitude. We also measure ion trapping lifetime, charging effects due to laser light incident on the trap electrodes, and the heating rate for a single trapped ion. The performance of this trap is found to be comparable with others of the same size scale.

We present the design, fabrication, and experimental implementation of surface ion traps with Y-shaped junctions. The traps are designed to minimize the pseudopotential variations in the junction region at the symmetric intersection of three linear segments. We experimentally demonstrate robust linear and junction shuttling with greater than one million round-trip shuttles without ion loss. By minimizing the direct line of sight between trapped ions and dielectric surfaces, negligible day-to-day and trap-to-trap variations are observed. In addition to high-fidelity single-ion shuttling, multiple-ion chains survive splitting, ion-position swapping, and recombining routines. The development of two-dimensional trapping structures is an important milestone for ion-trap quantum computing and quantum simulations.

In this paper we present the design, modeling, and experimental testing of surface electrode ion traps fabricated in a heterostructure configuration comprising a silicon substrate, silicon dioxide insulators, and aluminum electrodes. This linear trap has a geometry with symmetric RF leads, two interior DC electrodes, and 40 individual lateral DC electrodes. Plasma enhanced chemical vapor deposition (PECVD) was used to grow silicon dioxide pillars to electrically separate overhung aluminum electrodes from an aluminum ground plane. In addition to fabrication, we report techniques for modeling the control voltage solutions and the successful demonstration of trapping and shuttling ions in two identically constructed traps.