Eneet Kaur

Quantum low density parity check (qLDPC) codes, particularly bivariate bicycle (BB) codes, achieve competitive fault tolerance thresholds while offering substantially higher encoding rates than planar surface codes. However, their intrinsically long-range stabilizer structure makes them difficult to implement on monolithic devices with nearest neighbor connectivity and limited qubit capacity. In this work, we study the realization of a BB code in a modular multiprocessor architecture, where quantum processors are interconnected through shared Bell pairs. We consider processors with all to all internal connectivity, which is feasible on trapped ion and neutral atom platforms, enabling flexible local gate execution while inter-processor (nonlocal) gates are mediated by shared entanglement. We describe a star network architecture that can realize this distributed setting. We partition the qubits of the [[144,12,12]] BB code across 4, 6, and 12 quantum processors and analyze the resulting logical error rates and pseudo-threshold performance under circuit level noise by varying the number of processors and a scaling factor that captures the additional noise associated with nonlocal operations. We use Monte Carlo simulations with BP+OSD decoding and extend the previously known BB code ansatz to the distributed setting. Our results provide architectural insight and design considerations for distributed BB codes in modular quantum computing architectures.

Recent advances in quantum hardware and quantum error correction (QEC) have set the stage for early demonstrations of fault-tolerant quantum computing (FTQC). A key near-term goal is to build a system capable of executing millions of logical operations reliably -- referred to as a megaquop quantum computer (MQC). In this work, we propose a novel system architecture targeting MQC on trapped-ion quantum computers (TIQC), leveraging their ultra-high-fidelity single-qubit gates (1Q) and efficient two-qubit (2Q) logical CNOT gates enabled by the quantum charge-coupled device (QCCD) architecture with the ion shuttling feature. We propose Flexion, a hybrid encoding scheme that uses bare qubits for 1Q gates and QEC-encoded logical qubits for 2Q gates. This approach avoids fully encoding all qubits, eliminating the overhead of gate synthesis, teleportation, and magic state distillation for non-Clifford gates. To support this, we design (1) a low-noise conversion protocol between bare and logical qubits, (2) a bare-logical hybrid instruction set architecture tailored for 2D grid-based TIQC, and (3) a compiler that minimizes conversion cost and optimizes the scheduling efficiency. We evaluate our approach on VQA and small-scale FTQC benchmarks, showing that it achieves superior performance improvements with significantly reduced resource overhead, offering a practical path toward early FTQC on TIQC.