Sebastian Weidt

We demonstrate in situ removal of a transport-blocking defect on a surface-electrode ion trap device using a Q-switched Nd:YAG 532 nm pulsed ablation laser. This approach eliminates the need to vent and rebake the vacuum system, providing a low-overhead defect-remediation technique well suited for ion-shuttling architectures where system modifications typically incur substantial downtime - particularly in shuttling focussed experiments operating at temperatures that necessitate bakes. Additionally, the hardware used is readily available in many ion trap laboratories, making this solution attractive to experiments operating in such regimes. Following ablation, we observe near-unity shuttling success rates across the previously obstructed region and measure micromotion levels that remain within acceptable limits. This technique enables rapid, reliable restoration of transport pathways without interruption to experimental operation.

A major obstacle in the way of practical quantum computing is achieving scalable and robust high-fidelity entangling gates. To this end, quantum control has become an essential tool, as it can make the entangling interaction resilient to sources of noise. Nevertheless, it may be difficult to identify an appropriate quantum control technique for a particular need given the breadth of work pertaining to robust entanglement. To this end, we attempt to consolidate the literature by providing a non-exhaustive summary and critical analysis. The quantum control methods are separated into two categories: schemes which extend the robustness to (i) spin or (ii) motional decoherence. We choose to focus on extensions of the $σ_x\otimesσ_x$ Molmer-Sorensen interaction using microwaves and a static magnetic field gradient. Nevertheless, some of the techniques discussed here can be relevant to other trapped ion architectures or physical qubit implementations. Finally, we experimentally realize a proof-of-concept interaction with simultaneous robustness to spin and motional decoherence by combining several quantum control methods presented in this manuscript.

A major challenge for quantum computers is the scalable simultaneous execution of quantum gates. One approach to address this in trapped ion quantum computers is the implementation of quantum gates based on static magnetic field gradients and global microwave fields. In this paper, we present the fabrication of surface ion traps with integrated copper current carrying wires embedded inside the substrate below the ion trap electrodes, capable of generating high magnetic field gradients. The copper layer's measured sheet resistance of 1.12 m$Ω$/sq at room temperature is sufficiently low to incorporate complex designs, without excessive power dissipation at high currents causing a thermal runaway. At a temperature of 40 K the sheet resistance drops to 20.9 $μΩ$/sq giving a lower limit for the residual resistance ratio of 100. Continuous currents of 13 A can be applied, resulting in a simulated magnetic field gradient of 144 T/m at the ion position, which is 125 $μ$m from the trap surface for the particular anti-parallel wire pair in our design.

Microfabricated ion-trap devices offer a promising pathway towards scalable quantum computing. Research efforts have begun to focus on the engineering challenges associated with developing large-scale ion-trap arrays and networks. However, increasing the size of the array and integrating on-chip electronics can drastically increase the power dissipation within the ion-trap chips. This leads to an increase in the operating temperature of the ion-trap and limits the device performance. Therefore, effective thermal management is an essential consideration for any large-scale architecture. Presented here is the development of a modular cooling system designed for use with multiple ion-trapping experiments simultaneously. The system includes an extensible cryostat that permits scaling of the cooling power to meet the demands of a large network. Following experimental testing on two independent ion-trap experiments, the cooling system is expected to deliver a net cooling power of 111 W at ~70 K to up to four experiments. The cooling system is a step towards meeting the practical challenges of operating large-scale quantum computers with many qubits.

The cost of enabling connectivity in Noisy-Intermediate-Scale-Quantum devices is an important factor in determining computational power. We have created a qubit routing algorithm which enables efficient global connectivity in a previously proposed trapped ion quantum computing architecture. The routing algorithm was characterized by comparison against both a strict lower bound, and a positional swap based routing algorithm. We propose an error model which can be used to estimate the achievable circuit depth and quantum volume of the device as a function of experimental parameters. We use a new metric based on quantum volume, but with native two qubit gates, to assess the cost of connectivity relative to the upper bound of free, all to all connectivity. The metric was also used to assess a square grid superconducting device. We compare these two architectures and find that for the shuttling parameters used, the trapped ion design has a substantially lower cost associated with connectivity.

Trapped atomic ions are a proven and powerful tool for the fundamental research of quantum physics. They have emerged in recent years as one of the most promising candidates for several practical technologies including quantum computers, quantum simulators, atomic clocks, mass spectrometers and quantum sensors. Advanced fabrication techniques, taken from established and nascent disciplines, are being deployed to create novel, reliable devices with a view to large scale integration and commercial compatibility. This review will cover the fundamentals of ion trapping before proceeding with a discussion of the design of ion traps for the aforementioned applications. We will analyse current microfabrication techniques that are being utilised, as well as various considerations which motivate the choice of materials and processes. Finally, we discuss current efforts to include advanced, on-chip features into next generation ion traps.